1. Field of the Invention
Embodiments relate to a non-volatile memory device and a method of manufacturing the same and, more particularly, to a non-volatile memory device including a conductive layer and a barrier layer, and a method of manufacturing the same.
2. Description of the Related Art
A silicon oxide nitride oxide semiconductor (SONOS) or metal oxide nitride oxide semiconductor (MONOS) type non-volatile memory device may include a tunnel insulating layer formed on a channel region of a semiconductor substrate, a charge trapping layer for trapping electrons from the channel region, a blocking layer formed on the charge trapping layer, a gate electrode formed on the blocking layer, and source/drain regions formed at surface portions of the semiconductor substrate adjacent to the channel region.
The conventional non-volatile memory device may serve as a single level cell (SLC) or a multi-level cell (MLC), and may perform programming and erasing using a Fowler-Nordheim (F-N) tunneling mechanism and/or a channel hot electron injection mechanism.
For example, a programming voltage, e.g., about 5 V to about 18 V, may be applied to the gate electrode and electrons may be trapped in trap sites of the charge trapping layer from the channel region of the semiconductor substrate by F-N tunneling. Thus, a logic state, e.g., “1,” may be stored in the charge trapping layer. A threshold voltage in the channel region may be varied by the electrons trapped in the charge trapping layer, and the logic state may be read by applying reading voltages different from each other to the gate electrode and a drain region, and then detecting a current in the channel region.
The erasing operation of the non-volatile memory device may be performed by applying an erasing voltage, e.g., about −15 V to about −20 V, to the gate electrode. However, when the erasing voltage is applied to the gate electrode, a back-tunneling may occur, i.e., a phenomenon whereby electrons move from the gate electrode to the charge trapping layer through the blocking layer. Consequently, the time required for the erasing operation may be increased, and the data retention performance and operating reliability of the non-volatile memory device may be degraded.
One approach to ameliorating the above-described problems is to form the gate electrode using a material having a relatively high work function, such as metal nitride, metal oxide, etc. However, the work function of the gate electrode may subsequently be altered or varied during a later-applied heat treatment process. For example, after forming the gate electrode using metal nitride or metal oxide, the work function of the gate electrode may be undesirably varied during a heat treatment process for activating impurities (dopants) implanted in the source/drain regions. Consequently, there is a need for non-volatile memory device, and a method of making the same, wherein the back-tunneling of electrons through the blocking layer may be reduced or prevented.